We are looking for a FPGA engineer who will work round the year as a part time or full time basis and the position may be converted to a full time position when the candidate graduates from the school. A final year senior BS student or a master Student or a PhD student will be preferred. Candidate must have strong background in FPGA architecture, VHDL/VERILOG coding with FPGA, processor, Ethernet Communication with some exposure in SFP, FPGA-FPGA communication through SERDES, PCI express communication protocol etc. Proficiency in C, and python is not a must but will be preferred. Exposure in Matlab/Simulink and mathematical skill will be a plus. Experience in High Performance Computation will be given preference.